Porous silicon composites provide modified functionality, comparinged to as-prepared porous silicon and expanding its applicability.; Tthe formation of porous silicon layers on crystalline Si wafers using electrochemical etching ECE. Electrochemical etching is one of the simplest and most reliable methods used to synthesisze porous silicon PS [1-3]. The most widely investigated device structure using PS layer is crystalline silicon metal/PS/c-Si [4]. The electrical characteristics of metal/PS/c-Si/metal structures have been shown to exhibit similar rectifying features, irrespective of the metal used for top contacts. Therefore, transport of carriers within the PS layer thickness and across the c-Si/PS heterojunction governs the device characteristics [5]. Porous silicon photoconductors are commonly fabricated by depositing aluminium film on top of oxidized porous silicon structure. The passivation of the surface by oxidation could improve the external quantum efficiency of porous silicon photodiode [6].The practical applications are oriented towards the fabrication of new structures and devices. The compatibility of the nanocrystalline silicon-based materials with the classic mono- and/or polycrystalline silicon (bulk or thin films) permits the use of these new materials for the integrated micro- and optoelectronics, photonic crystals, biomedical applications, or efficient sensors [7]. To study the PS/c-Si junction properties, I-V measurements, usually, provide a valuable source of information about the junction properties. Analysis of current–voltage I–V characteristics of Al/PS Schottky junction allows us to understand different aspects of current transport. For an ideal Schottky diode, the current flow is only due to thermionic emission mechanism and the ideality factor should be equal to unity. However, this is due to various factors, such as device temperature, dopant concentration, device area, density of interface states, structural properties of interface, etc., [8]. In this work, Al films were deposited onto porous layer /Si wafers by thermal evaporation to form rectifying junctions. The electrical properties of the junctions were determined by current-voltage I-V. In this paper, we present an effect etching time on I-V measurement of Al/PS/p-Si devices and influence that on the ideality factor and dynamic resistance.